According to the company, the multi-threaded, multicore, multi-cluster design delivers new levels of system efficiency and scalable computing for many core heterogeneous designs.
Jim Nicholas, executive VP of MIPS Processor IP, said: “With the I6500, we are setting a new standard for scalable, heterogeneous many-core designs – and providing a highly differentiated solution for visionary companies that want to transform markets.”
The MIPS I6500 CPU is a 64bit core that is said to be scalable from embedded to cloud. Imagination says the core has a ‘heterogenous inside’ feature in which designers can configure each CPU in a cluster with different combinations of threads, cache sizes, frequencies and voltage levels.
According to the company, clusters hold a maximum of six cores and up to 64 clusters can be created.
An AMBA ACE interface is included, along with simultaneous multithreading (SMT) and hardware virtualisation (VZ). According to Imagination, the combination of SMT and VZ offers ‘zero context switching’ for those applications requiring deterministic code execution.
Imagination has also said the I6500 CPU will be at the heart of Mobileye’s EyeQ5 SoC, which is designed to act as the central computer performing sensor fusion in fully autonomous vehicles. EyeQ5 will feature eight multi-threaded MIPS CPU cores coherently coupled with 18 Mobileye Vision Processor cores (VPs).
Elchanan Rushinek, Mobileye’s senior VP of engineering, added: “Imagination’s multi-threaded MIPS CPUs have helped us achieve performance increases of more than six times with each successive generation of EyeQ SoC. Now, with the EyeQ5, we are looking at an eightfold increase.”