LONDON -- StarChip SAS (Meyreuil, France), a developer of application-specific processors that was founded in 2009, has announced the development of the ARX 32-bit secure core for use in payment and identification markets. ARX is based on the APS3s 32-bit RISC processor from Cortus SA (Montpellier, France).
StarChip and Cortus have signed an agreement allowing StarChip to augment the design of the APS3s to implement embedded security mechanisms. This has been the starting point for StarChip to implement a self-healing security architecture that counters both side-channel attacks and fault injection attacks used to try and obtain cryptography keys.
The ARX CPU development is the key to having unsecured software algorithms running in a fully secure way on a CPU without adding costly software counter-measures, StarChip said.
"We have verified the quality and the efficiency of the Cortus APS3s core from our experience in the SIM controller market," said Yves Fusella, CTO of StarChip, in a statement. "Having an agreement between StarChip and Cortus to modify the APS3s was also a key element in our decision of choosing the APS3 as a starting point for the ARX core. It allows the StarChip team to use the best design practices and to implement state-of-the-art and innovative security mechanisms while optimizing the overall gate count of the CPU."
"This demonstrates the wide range of applications of our processor cores, from these security systems through wireless metering and to powerful multi-core controllers." said Michael Chapman, president and CEO of Cortus, in the same statement.
This story was originally posted by EETimes.
