HUNTSVILLE, AL—Microsemi (Aliso Viejo, Calif.) has just become the first FPGA provider to offer the open architecture RISC-V as a soft IP processor core, along with a comprehensive software tool chain for embedded designs.
Pronounced "Risk Five," the RISC-V is not a processor core per se; instead, it is an open-source instruction set architecture (ISA) that is based on established reduced instruction set computing principles.
The RISC-V ISA was designed from the ground-up to be useful in modern computerized devices, ranging from warehouse-scale cloud computers to high-end smartphones to the smallest embedded systems.
In contrast to most ISAs, RISC-V is freely available for all types of use, permitting anyone to design, manufacture, and sell RISC-V chips and software. The fact that the open source RTL for Microsemi's RISC-V IP core is available for inspection addresses reliability and security concerns; this is a significant differentiator compared to proprietary cores, which are typically provided in an obfuscated (unreadable) form.
Microsemi's RISC-V IP core was developed in collaboration with SiFive. Unlike proprietary soft processor cores, any software developed Microsemi's implementation will be completely portable across all chips that have a RISC-V core.
The RV32IM RISC-V core is available for Microsemi's IGLOO2 FPGAs, SmartFusion2 system-on-chip (SoC) FPGAs, and RTG4 FPGAs, along with an Eclipse-based SoftConsole integrated development environment (IDE) hosted on a Linux platform and the Libero SoC Design Suite providing full design support.
In the case of the 100 MHz SmartFusion2 implementation, for example, Microsemi's RV32IM RISC-V core -- which can be booted from eNVM or SPI Flash -- boasts a 5-stage pipeline that consumes only 12K logic elements while providing 1.1 Dhrystone MIPS (Million Instructions per Second) per MHz.
(Source: Microsemi)
Target markets for Microsemi's RV32IM RISC-V core include communications, industrial, defense, and automotive. Recently introduced solutions include a video and imaging system, a deterministic multi-axis motor controller, and an EtherCAT slave controller.
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— Max Maxfield, Editor of All Things Fun & Interesting 