Released by the OpenCAPI Consortium – whose members include AMD, Dell EMC, Google, Hewlett Packard Enterprise, IBM, Mellanox, Micron, NVIDIA and Xilinx – OpenCAPI should allow memory, accelerators, networking and storage to integrate their functions more tightly within servers. This, say the partners, will help to eliminate system bottlenecks and improve server performance.
While IBM and Google will be unveiling servers featuring the former’s POWER9 technology, Mellanox will be integrating OpenCAPI capability into its future communications devices while Xilinx will support the standard in its FPGAs.
Brad McCredie, pictured, IBM’s vp of POWER development, said: “With the support of our OpenCAPI co-founders, we have created a new OpenCAPI specification that tremendously improves performance over our prior specification and IBM will be among the first to implement it with our POWER9 products expected in 2017.”
Said to be capable of data rates of up to 25Gbit/s, OpenCAPI will be significantly faster than PCIe’s maximum of 16Gbit/s. OpenCAPI says the OpenCAPI specification will be made available before the end of 2016.
In May 2016, AMD, ARM, Huawei, IBM, Mellanox, Qualcomm and Xilinx announced the CCIX specification, intended to allow processors using different instruction set architectures to share data coherently. More recently, the Gen-Z consortium was launched to develop an open systems interconnect that provides easier access to large volumes of data.
The three organisations have welcomed each other’s announcements as part of a collaborative industry effort to create an open datacentre architecture.
