SANTA CLARA, Calif.--Intel’s first microserver processor is less power efficient than its existing Xeon chips, leaving a significant opportunity for alternative SoCs, according to Linley Gwennap, principal of the Linley Group.
Intel released
last year the Atom S1000, also known as Centerton, a dual core chip meant to fend off mainly ARM-based server SoCs from a growing group of vendors. While it reduced power consumption to 6.3W, it does not support Ethernet, Serial ATA or USB controllers or multithreading.
“According to data Intel provided, this chip is less power efficient than its Xeon, so it seems like we are going in the wrong direction,” Gwennap said. “It’s not really a system on a chip yet, it has significantly lower performance and only uses 32-nm process technology,” he said at the
Linley Data Center Conference here.
Gwennap characterized the chip as a placeholder for Avoton, a 22-nm CPU with a new Atom core. “They haven’t announced what it is yet, and it will not be in production until the second half of the year,” he added.
Linley Group recently released a report that projects alternative server SoCs will compete for an available market of $2.5 billion by 2016. That’s about 30 percent of a server processor market that the report estimated is edging toward $10 billion a year. The forecast assumes Microsoft will not have a version of Windows Server for ARM during that period.
Both sides have their challenges, Gwennap noted. ARM server SoCs need to port x86 server software, they won’t support 64-bit addressing until later this year and they have a lower single-thread performance than the x86, he said. In addition, Intel has a process edge and will use it to roll 14-nm chips in 2014.
On the other hand, the x86 architecture was designed for best single-thread performance. As such it is encumbered by complexities such as an ability to manage up to 168 instructions simultaneously in flight in the latest chips and up to 192 in the next-generation Haswell.
“There’s a lot of logic just moving data around without doing useful computations,” Gwennap said.
Click on image to enlarge.The typical Xeon has blocks geared to support dozens of instructions in flight, said Gwennap.
