The UltraLink D2D PHY IP is an enabling technology for chiplet and system-in-package (SiP) applications, and looks to enable system-on-chip (SoC) providers to deliver more customised solutions that offer higher performance and yields while also shortening development cycles and reducing costs through greater IP reuse.
The UltraLink D2D PHY IP looks to deliver up to 40Gbps wire speed in an NRZ serial interface, providing up to 1Tbps/mm unidirectional bandwidth. The IP includes built-in de-skew and scrambling/de-scrambling logic to enable easy system integration. Its low wire count of 28 data wires for 1Tbps bandwidth enables easier routing and potentially reduces package cost, whereas alternative solutions can require 30% or more wires.