The two companies will do this through extending high DRAM performance levels with High Bandwidth Memory (HBM2E) on GLOBALFOUNDRIES’s recently announced 12LP+ FinFET solution.
In order to achieve the capacity and bandwidth for data-intensive AI training applications, system designers are challenged with squeezing more bandwidth into a smaller area while maintaining a reasonable power profile.
SiFive’s customisable high bandwidth memory interface on GLOBALFOUNDRIES’s 12LP platform and 12LP+ solution will enable easy integration of high bandwidth memory into a single System-on-Chip (SoC) solutions to deliver fast, power-efficient data processing for AI applications in the computing and wired infrastructure markets.
Mohit Gupta, vice president and general manager, IP Business Unit at SiFive commented, “Extending SiFive’s reference IP platform, with HBM2E, on GF’s best-in-class performance 12LP+ solution delivers new levels of performance and integration for next generation SoCs and accelerators. Deployment of highly optimised silicon requires highly customisable capabilities in order to realise the much-needed higher TOPS per milliwatt with low latency performance required for AI, while balancing the needs for low power and smaller area footprints.”
As a part of the collaboration, designers will also have access to SiFive’s RISC-V IP portfolio and DesignShare IP ecosystem, which will use GLOBALFOUNDRIES’s 12LP+ Design Technology Co-Optimisation (DTCO).
The companies say this will help designers significantly increase silicon specialisation, improve design efficiency and deliver differentiated SoC solutions quickly and cost-effectively.
