3D integration brings together expertise and equipment addressing the entire 3D integration value chain: technology, circuit architecture, EDA tools, packaging and test.
STMicroelectronics (IDM), Mentor (EDA), a Siemens business, EVG and SET (equipment suppliers), and CEA-Leti (RTO) are current members and the consortium has developed the first 3D stack imager at a 1.44µm pitch using wafer-to-wafer direct hybrid technology.
Séverine Chéramy, director of IRT Nanoelec’s 3D integration program, said the objective is to demonstrate the value of wafer-to-wafer technologies, using fine-pitch, direct hybrid bonding, for a new use case.
“I’m particularly proud to welcome Prophesee, a French SME, to the program. This is a real success of IRT Nanoelec’s previous work, and the first goal of our programs: to develop technologies for new uses and new applications, and to provide them with added value to our industrial partners,” Chéramy said. “It will also bring to the consortium some additional challenges for automotive or Internet of Things applications. I’m convinced of all the potential of this collaboration.”
Jean-Luc Jaffard, vice president sensor engineering and operations of Prophesee, said, “We are very enthusiastic to join IRT Nanoelec’s 3D integration consortium, which is comprised of key industry leaders, and gain access to so many advanced technologies. This new partnership will be very valuable to further expanding Prophesee’s product offering in coming years.”
