The Cadence tools have been confirmed to meet Samsung Foundry’s technology requirements, which let customers who produce high-end products for the mobile, networking, server and automotive markets attain optimal power, performance and area (PPA).
“As part of our longstanding collaboration with Cadence, we’ve confirmed that its digital full-flow meets and exceeds the requirements for designing with the 5LPE process technology,” said Jung Yun Choi, vice president of the Design Technology Team at Samsung Electronics. “By deploying the latest Cadence market-leading digital flow and Samsung advanced-node technology, customers can confidently create innovative designs for emerging high-end markets such as the mobile, networking, server, automotive, industrial, and artificial intelligence markets.”
The Cadence digital flow was certified by Samsung using the Arm Cortex-A53 and Cortex-A57 cores for the 5LPE process. To ensure the Cadence flow is easy to understand and use, it incorporates a Cadence flow manager with a common user interface across the complete toolset. The Cadence tools optimised for the Samsung 5LPE process include the Genus Synthesis Solution, Innovus Implementation System, Joules RTL Power Solution, Conformal Equivalence Checking, Conformal Low Power, Modus DFT Software Solution, Quantus Extraction Solution, Tempus Timing Signoff Solution, Voltus IC Power Integrity Solution, Physical Verification System, Litho Physical Analyzer and Cadence CMP Predictor.
“Through our ongoing collaboration with Samsung Foundry, we’re making it faster and easier for customers to create advanced-node designs in an age of increasing complexity,” said KT Moore, vice president, product management in the Digital & Signoff Group at Cadence. “The powerful combination of the Cadence digital implementation and signoff full-flow, Samsung 5LPE process, and Arm cores gives customers access to the latest technologies to optimize PPA and create tomorrow’s innovations.”
