In the demonstration, TE’s OSFP IO connector will be combined with Credo’s 16nm PAM4 SerDes technology to transmit data over a 10in PCB channel. The small form factor pluggable connector is designed to provide support eight lanes and to deliver 400GbE levels of performance amd. when paired with Credo’s 112G PAM4 SerDes, the combination is said to have bit error rate of better than 10 -7. The demonstration is also intended to show the OSFP connector can be capable of transmitting 800Gbit/s.
“Credo’s proven low power silicon expertise being advanced to 112G SerDes is a key technology milestone,” said Nathan Tracy, a member of TE’s system architecture team. “Credo is enabling the industry to progress quickly to 112Gbit/s serial electrical signalling, which may pave the way for accelerating the deployment of 112G single lane, end-to-end network connectivity.”
Jeff Twombly, Credo’s vice president of business development, added: “TE’s OSFP IO connector demonstrates the extremely low noise performance that will be required in 112Gbit/s IO applications. In addition, the performance of TE’s latest STRADA Whisper backplane connector enables the balance of the 112Gbit/s signalling interconnect ecosystem.”
